Staff Verification Engineer Job in Hyderabad at Semtech

Semtech is hiring for the role of Staff Verification Engineer!

Responsibilities of the Candidate:

• Perform block and chip-level verification in register-transfer level (RTL), gate-level and analog/mixed-signal (AMS).
• Run digital/mixed-signal simulations as well as formal verification.
• Work closely with the design team to create a verification strategy and detailed verification plan.
• Develop tests, run regressions, and monitor coverage to ensure tape-out quality.
• Participate in design or project reviews and support these with verification perspective and schedule/priority assessment.
• Support post-silicon bring-up and debug, for bench validation and automated test equipment (ATE) testing.
• Improve verification scalability and portability from project to project by environment enhancement and tools automation.

Requirements:

• 3+ years experience in the semiconductor industry
• M.S. in EE/CS/CE or higher
• Hands-on experience with SystemVerilog as a High-level Verification Language and UVM implementation
• Debugging digital simulation in RTL and gate-level netlist isolates issues in both module and system levels
• Scripting experience in Python or Perl
• Clear understanding of ASIC design flow
• Solid analytical and problem solving skills
• Independent, self-motivated, rigorous, team player and able to follow through
• Excellent verbal and written communication skills