Software Engineer II (Verification) Job in Ahmedabad at Cadence

Cadence is hiring for the role of Software Engineer II (Verification)!

Responsibilities of the Candidates:

• Developing performance-optimized VIPs for the latest (draft/ballot) specifications of various protocols and interfaces.
• Verifying the VIPs for proper functionality and system scenarios (including erroneous conditions)
• Developing test suite and compliance test suite for 100% functional coverage for a given specification.
• Documenting the design and implementation for engineering details and customers.
• Interacting with internal and external customers and resolving issues on time.

Requirements:

• BE/BTech/ME/MS/MTech in Electrical/Electronics
• 2 - 8 years of experience in Verification
• Expertise in one or more domains – UVM, System Verilog
• Knowledge of Verification environments based on UVM, System Verilog
• Should have participated in building IP/full chip verification environments, verification planning and closure process.
• Domain expertise in MIPI or any other storage protocol would be a strong plus
• Programming skills: C, Verilog, System Verilog mandatory. C++ would be a strong plus.
• Very good debugging and analytical skills
• Should have good communication skills and should be a good team player