Soc Physical Design Engineer Job in Bangalore at Intel

Intel is hiring for the role of Soc Physical Design Engineer!

Responsibilities of the Candidates:

• SOC, clock design, and power delivery integration.
• Driving performance optimization, including co-optimization work with process teams, to create best-in-class designs.
• Physical synthesis, place and route, and clock tree synthesis with Synopsys or Cadence tools.
• Static timing analysis constraint understanding and generation, clock stamping, and timing closure.
• Multiple Power Domain analysis using standard Power Formats UPF or CPF.
• The ideal candidate should exhibit behavioral traits that indicate:
• Self-motivator with strong problem-solving skills.
• Excellent interpersonal skills, including written, verbal, and presentation communications
• Attention to detail and organizational skills
• Ability to work as part of a team and collaborate in a high-paced atmosphere.

Requirements:

• BS/BTech degree with 3 years of experience, or MS/MTech degree with 1 year of experience, in Electrical Engineering, Computer Engineering, or a related field
• 2+ years of experience in backend design and/or integration in one of the following areas:
• Physical synthesis, place and route, and clock tree synthesis with Synopsys or Cadence tools.
• Static timing analysis constraint understanding and generation, clock stamping, and timing closure.
• Multiple Power Domain analysis using standard Power Formats UPF or CPF