Security RTL Design Engineer Job in Bengaluru at Google

Google is hiring for the role of Security RTL Design Engineer!

Responsibilities of the Candidate:

• Perform Verilog/System Verilog RTL coding, functional/performance simulation debug and Lint/CDC/FV/UPF checks.
• Participate in test planning and coverage analysis.
• Develop RTL implementations that meet competitive power, performance and area goals.
• Participate in synthesis, timing/power closure and FPGA and silicon bring-up.
• Work with multi-disciplined and multi-site teams in Architecture, RTL design, verification, DFT and Physical Design.

Requirements:

• Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
• Experience with ASIC design methodologies and Quality Assurance flows (e.g., VCLP, Lint, CDC, RDC, SGDFT).
• Experience designing RTL digital logic using SystemVerilog for ASICs or similar.
• Experience with a scripting language such as Perl or Python.
• Experience with area, power and performance development.
• Master's degree or PhD in Electrical Engineering, Computer Science, or a related field.
• Experience with design and development of security blocks or crypto blocks.