Physical Design Engineer Job in Hyderabad at Intel

Intel is hiring for the role of Physical Design Engineer!

Responsibilities of the Candidate:

• Creates bottom elements of chip design including but not limited to Device cell and block level layouts, Block level floor plans, abstract view generation, RC extraction, and schematic layout verification.
• Debug using phases of physical design development including parasitic extraction clock generation, custom polygon, editing auto place and route algorithms, Floor planning, full chip assembly, RV DFM, Density, and verification.
• Troubleshoots design issues and applies proactive intervention.
• May schedule staffing execution and verification of complex chips development and execution of project methodologies and/or flow developments.

Requirements:

• Possess a BE or BTech or equivalent technical degree in Electronics and Electrical engineering with knowledge in Layout design.
• Experience, Skills, and Additional qualifications include Proficiency in multiple levels of layout design which includes data path register files and standard cell designs. Proficiency in floor planning activities which include FUBunit level assembly routing and integration of custom blocks into the FC floorplan.
• Ability to comprehend issues of RC delay electromigration self-heating and cross capacitance Ability to recognize failure-prone layout structures and proactively contact engineers for guidance and produce an electrically robust layout.