Digital Design Engineer Job in Bangalore at Google

Google is hiring for the role of Digital Design Engineer!

Responsibilities of the candidate:

• Interact with the architecture team and develop implementation strategies to meet quality,
  schedule, and power performance area for sub-system/chip-level integration.
• Interact with the subsystem team and plan SOC milestones, and quality checks as part of
  SOC milestones, and guide subsystem teams with SOC-level requirements (e.g., IPXACT,
  CSR, Lint, CDC, SDC, UPF, etc.).
• Work with the cross-functional team of verification, design for test, physical design, emulation, and software teams to make design decisions and represent project status throughout the development process.

Requirements:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• Experience with Verilog or SystemVerilog language.
• Experience in high-performance design, and multi-power domains with clocking.
• Experience with multiple SoCs with silicon success.
• Domain knowledge in one or more of the following: Process Cores, Interconnects, Debug and
  Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, PinMux.
• Understanding of cross-domain involving domain validation, design for testing, physical
  design, and software.
• Proficiency with ASIC design methodologies for front quality checks (e.g., Lint, CDC/RDC,
  Synthesis, design for testing, ATPG/Memory BIST, UPF, and Low Power
  Optimization/Estimation).
• Proficiency with chip design flow including synthesis.