DFT Engineer Job in Bangalore at NVIDIA

NVIDIA is hiring for the role of DFT Engineer!

Responsibilities of the Candidate:

• Designing and implementing state-of-the-art designs in test access mechanisms, memory BIST, and scan compression.
• Verifying and silicon bring-up Scan ATPG and other DFT features.
• Developing and deploying DFT methodologies for our next-generation products.
• Being a part of innovation to strive to improve the quality of DFT methods.
• Working with multi-functional teams to incorporate DFT features into the chip.

Requirements:

• B.Sc/M.Sc from reputed institutions or equivalent experience.
• 1+ Years of experience preferably in Design for testability (DFT).
• Strong understanding of static timing Analysis, ECO, ASIC/Logic Design Flow, HDL, and Digital logic design.
• Experience in RTL and Gates verification and simulation.
• Familiarity with BIST architecture and JTAG/IEEE1149.1/IEEE1500.
• Strong DFT knowledge in Scan ATPG, compression techniques, and memory tests.
• Strong analytical and problem-solving skills.
• Expert coding skills in industry-standard scripting languages.
• Extraordinary written and oral communication skills with the curiosity to work on rare challenges.