Design Engineer II Job in Bengaluru at Cadence

Cadence is hiring for the role of Design Engineer II!

Responsibilities of the Candidate:

• Pre-silicon emulation and Verification of System in NCSIM and Palladium.
• Hardware and Subsystem Design for all the Projects. (HW/SW infrastructure designed within the team.)
• Prototyping and Firmware Development for our High-Speed Serdes like PCIe, CXL, UCIe, USB, and ethernet.
• Lead the Bringup, Debug, Compliance efforts, and System level Characterization all the way to report release.
• Engage in interop and Customer Debug.
• Chance to work on cutting-edge SERDES IPs from Cadence. Refer to Cadence's Website for more details on our SERDES IPs.
• Tremendous learning curve on SERDES PHY, Controllers, Protocol, and System integration.
• Hardware and Subsystem design expertise.
• The Kick in deploying and debugging your Solutions in different System environments.

Requirements:

• 1-3 years (with Btech) or 0-2 years (with Mtech) experience in Post-Silicon PHY and Systems Validation.
• Physical Layer and Protocol layer experience on At least one High-speed SERDES.
• Debug skills.
• Experience in using lab equipment such as Oscilloscopes, Bit Error Rate Testers, Protocol Exercisers, and Analyzers.
• Experience leading System validation efforts for SERDES solutions.
• Experience in PCIe LTSSM states is a plus.
• Experience in FPGA Design and Schematic design.
• Experience in IP/SoC Physical Layer Electrical Validation experience.
• Familiarity with Verilog RTL coding, FPGA coding, python, C/C++
• Candidates are expected to be passionate about analog and digital electronic circuit design.