CAD Methodology Engineer - Front End Job in Bangalore at Google

Google is hiring for the role of CAD Methodology Engineer - Front End!

Responsibilities of the Candidate:

• Design new RTL and/or design verification methodologies and flows for high-performance IPs.
• Identify inefficiencies and improvement opportunities in the front-end chip implementation process and propose ideas to address them.
• Be responsible for designing our custom RTL and/or infrastructure solutions for IPs and hierarchical designs, and make it a delightful experience for our customers.
• Work with cross-functional teams and chip leads globally to drive changes.

Requirements:

• Master’s degree in Computer or Electrical Engineering
• Experience in designing or verifying digital logic using SystemVerilog for FPGAs, ASICs, and/or SoCs
• Experience in design verification technologies like UVM, simulation, coverage collection, test planning, debugging, integration flows, build/release flows
• Experience in programming languages such as C++ and scripting languages such as Python/Perl/TCL
• Experience in interacting with Electronic Design Automation (EDA) vendors and understanding of some of the EDA design tools like VCS, Xcelium, Verdi, Spyglass, Coretools, Defacto/Magillem
• Excellent scripting skills in Python, Perl, and TCL
• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer science, or equivalent practical experience
• 3 years of experience with development projects in VLSI
• Experience in RTL design, verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation