ASIC Silicon Design Engineer Job in Bengaluru at Google

Google is hiring for the role of ASIC Silicon Design Engineer!

Responsibilities of the Candidate:

• Demonstrate proficiency in RTL development (Verilog, System Verilog) and debugging functional/performance simulations.
• Define microarchitecture details including interface protocols, block diagrams and data flow.
• Perform RTL quality checks such as Lint, CDC, Synthesis, and UPF checks.
• Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up.
• Collaborate within a team to develop and deliver optimized interconnect blocks and subsystems. And coordinate with architecture, design verification, and implementation teams to ensure specification adherence.

Requirements:

• Bachelor’s degree in Electrical or Computer Engineering, or equivalent practical experience is required.
• Experience with digital design in ASIC.
• Experience with a scripting language like Python or Perl.
• Experience with RTL design utilizing Verilog/System Verilog is necessary.
• Experience with ARM-based SoCs, interconnects, and ASIC methodology.
• Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience.
• 2 years of experience with digital design in ASIC.
• Experience with AMBA protocols.
• Experience with a scripting language like Python.
• Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).
• Experience with methodologies for low power estimation, timing closure, synthesis.