ASIC Physical Design Engineer Job in Bangalore at Synopsys

Synopsys is hiring for the role of ASIC Physical Design Engineer!

About Synopsys:

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

Requirements:

• Bachelor's or Master's degree in electronics or electrical engineering  or equivalent from reputed universities with 2-3 years experience in ASIC design or internship of a few months
• Working experience on advanced technology nodes like 28nm,16nm,14nm,10nm, and 7nm with different foundries
• A clear understanding of CMOS & ASIC flow in submicron process nodes
• Knowledge of place & route, physical verification (DRC/LVS) & Timing analysis skills
• Be familiar with all stages in the ASIC design flow including Synthesis, DFT, timing analysis, floor planning, power planning, CTS, ECO flow, STA, power analysis
• Be familiar with the low-power concepts & UPF/CPF format
• Good understanding of Tech file, liberty, lef, def, GDS & standard cells view generation process (Milkyway & NDM)
• Experience using Synopsys (ICC/ICC-II/Fusion Compiler, DC, PT) tools, and Cadence (soce/innovus, RC/genus) design tools.