ASIC Design for Testability Engineer Job in Bengaluru at Google

Google is hiring for the role of ASIC Design for Testability Engineer!

Responsibilities of the Candidate: 

• Worked on a team of Design for Testing (DFT) engineers, working closely with RTL and Physical Designer engineers
• Write basic to complex scripts to automate the DFT flow
• Communicate and work with multi-disciplined and multi-site teams
• Work with members of the DFT team to deliver overall deliverables for an IP or SoC

Requirements:

• Bachelor's degree in Mechanical Engineering, Electrical Engineering, Industrial Engineering, or equivalent practical experience
• 3 years of experience in Design for Testability
• Experience with any one of the ATPG, LV, BIST, JTAG tools, and flow
• Preferred Qualifications:
  
  • Experience with a scripting language such as Perl.
  • Experience with Synthesis, Logic Testing, and ATPG.
  • Knowledge of design DFT techniques used for logic testing.
  • Ability to scale DFT, with a focus on minimal area overhead.